Nand2Tetris Chapter3

Nand2Tetris :  https://www.coursera.org/learn/build-a-computer

Build a Modern Computer from First Principles: From Nand to Tetris (Project-Centered Course)

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Chapter 3

Memory

Chapter 3에서는 Chapter 1,2에서의 연산자들을 이용해 Register, RAM, PC를 제작해야 한다.

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1. Bit

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/Bit.hdl

/**
 * 1-bit register:
 * If load[t] == 1 then out[t+1] = in[t]
 *                 else out does not change (out[t+1] = out[t])
 */

CHIP Bit {
    IN in, load;
    OUT out;

    PARTS:
    DFF (in=out1, out=out2);
    Mux (a=out2, b=in, sel=load, out=out1);
    And (a=out2, b=out2, out=out);
}

 

2. Register

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/Register.hdl

/**
 * 16-bit register:
 * If load[t] == 1 then out[t+1] = in[t]
 * else out does not change
 */

CHIP Register {
    IN in[16], load;
    OUT out[16];

    PARTS:
    Bit (in=in[0], load=load, out=out[0]);
    Bit (in=in[1], load=load, out=out[1]);
    Bit (in=in[2], load=load, out=out[2]);
    Bit (in=in[3], load=load, out=out[3]);
    Bit (in=in[4], load=load, out=out[4]);
    Bit (in=in[5], load=load, out=out[5]);
    Bit (in=in[6], load=load, out=out[6]);
    Bit (in=in[7], load=load, out=out[7]);
    Bit (in=in[8], load=load, out=out[8]);
    Bit (in=in[9], load=load, out=out[9]);
    Bit (in=in[10], load=load, out=out[10]);
    Bit (in=in[11], load=load, out=out[11]);
    Bit (in=in[12], load=load, out=out[12]);
    Bit (in=in[13], load=load, out=out[13]);
    Bit (in=in[14], load=load, out=out[14]);
    Bit (in=in[15], load=load, out=out[15]);
}

 

3. RAM8

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/RAM8.hdl

/**
 * Memory of 8 registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM8 {
    IN in[16], load, address[3];
    OUT out[16];

    PARTS:
    DMux8Way (in=load, sel=address, a=a,b=b,c=c,d=d,e=e,f=f,g=g,h=h);
    Register (in=in, load=a, out=out1);
    Register (in=in, load=b, out=out2);
    Register (in=in, load=c, out=out3);
    Register (in=in, load=d, out=out4);
    Register (in=in, load=e, out=out5);
    Register (in=in, load=f, out=out6);
    Register (in=in, load=g, out=out7);
    Register (in=in, load=h, out=out8);
    Mux8Way16 (a=out1, b=out2, c=out3, d=out4, e=out5, f=out6, g=out7, h=out8, sel=address, out=out);
}

 

4. RAM64

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/RAM64.hdl

/**
 * Memory of 64 registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM64 {
    IN in[16], load, address[6];
    OUT out[16];

    PARTS:
    DMux8Way (in=load, sel=address[3..5], a=a,b=b,c=c,d=d,e=e,f=f,g=g,h=h);
    RAM8 (in=in, load=a, address=address[0..2], out=out1);
    RAM8 (in=in, load=b, address=address[0..2], out=out2);
    RAM8 (in=in, load=c, address=address[0..2], out=out3);
    RAM8 (in=in, load=d, address=address[0..2], out=out4);
    RAM8 (in=in, load=e, address=address[0..2], out=out5);
    RAM8 (in=in, load=f, address=address[0..2], out=out6);
    RAM8 (in=in, load=g, address=address[0..2], out=out7);
    RAM8 (in=in, load=h, address=address[0..2], out=out8);
    Mux8Way16 (a=out1, b=out2, c=out3, d=out4, e=out5, f=out6, g=out7, h=out8, sel=address[3..5], out=out);
}

 

5. RAM512

// This file is part of the materials accompanying the book 
// "The Elements of Computing Systems" by Nisan and Schocken, 
// MIT Press. Book site: www.idc.ac.il/tecs
// File name: projects/03/b/RAM512.hdl

/**
 * Memory of 512 registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM512 {
    IN in[16], load, address[9];
    OUT out[16];

    PARTS:
    DMux8Way (in=load, sel=address[6..8], a=a,b=b,c=c,d=d,e=e,f=f,g=g,h=h);
    RAM64 (in=in, load=a, address=address[0..5], out=out1);
    RAM64 (in=in, load=b, address=address[0..5], out=out2);
    RAM64 (in=in, load=c, address=address[0..5], out=out3);
    RAM64 (in=in, load=d, address=address[0..5], out=out4);
    RAM64 (in=in, load=e, address=address[0..5], out=out5);
    RAM64 (in=in, load=f, address=address[0..5], out=out6);
    RAM64 (in=in, load=g, address=address[0..5], out=out7);
    RAM64 (in=in, load=h, address=address[0..5], out=out8);
    Mux8Way16 (a=out1, b=out2, c=out3, d=out4, e=out5, f=out6, g=out7, h=out8, sel=address[6..8], out=out);
}

 

6. RAM4K

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/b/RAM4K.hdl

/**
 * Memory of 4K registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM4K {
    IN in[16], load, address[12];
    OUT out[16];

    PARTS:
    DMux8Way (in=load, sel=address[9..11], a=a,b=b,c=c,d=d,e=e,f=f,g=g,h=h);
    RAM512 (in=in, load=a, address=address[0..8], out=out1);
    RAM512 (in=in, load=b, address=address[0..8], out=out2);
    RAM512 (in=in, load=c, address=address[0..8], out=out3);
    RAM512 (in=in, load=d, address=address[0..8], out=out4);
    RAM512 (in=in, load=e, address=address[0..8], out=out5);
    RAM512 (in=in, load=f, address=address[0..8], out=out6);
    RAM512 (in=in, load=g, address=address[0..8], out=out7);
    RAM512 (in=in, load=h, address=address[0..8], out=out8);
    Mux8Way16 (a=out1, b=out2, c=out3, d=out4, e=out5, f=out6, g=out7, h=out8, sel=address[9..11], out=out);
}

 

7. RAM16K

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/b/RAM16K.hdl

/**
 * Memory of 16K registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM16K {
    IN in[16], load, address[15];
    OUT out[16];

    PARTS:
    DMux8Way (in=load, sel=address[12..14], a=a,b=b,c=c,d=d,e=e,f=f,g=g,h=h);
    RAM4K (in=in, load=a, address=address[0..11], out=out1);
    RAM4K (in=in, load=b, address=address[0..11], out=out2);
    RAM4K (in=in, load=c, address=address[0..11], out=out3);
    RAM4K (in=in, load=d, address=address[0..11], out=out4);
    RAM4K (in=in, load=e, address=address[0..11], out=out5);
    RAM4K (in=in, load=f, address=address[0..11], out=out6);
    RAM4K (in=in, load=g, address=address[0..11], out=out7);
    RAM4K (in=in, load=h, address=address[0..11], out=out8);
    Mux8Way16 (a=out1, b=out2, c=out3, d=out4, e=out5, f=out6, g=out7, h=out8, sel=address[12..14], out=out);
}

 

8. PC

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/PC.hdl

/**
 * A 16-bit counter with load and reset control bits.
 * if      (reset[t] == 1) out[t+1] = 0
 * else if (load[t] == 1)  out[t+1] = in[t]
 * else if (inc[t] == 1)   out[t+1] = out[t] + 1  (integer addition)
 * else                    out[t+1] = out[t]
 */

CHIP PC {
    IN in[16],load,inc,reset;
    OUT out[16];

    PARTS: 
    // inc part
    Mux (a=load, b=true, sel=inc, out=load2);
    Inc16 (in=out2, out=out3);
    Mux16 (a=in, b=out3, sel=inc, out=in2);

    //load part
    Mux (a=load2, b=load, sel=load, out=load3);
    Mux16 (a=in2, b=in, sel=load, out=in3);

    //reset part
    Mux (a=load3, b=true, sel=reset, out=load4);
    Mux16 (a=in3, b=false, sel=reset, out=in4);

    //using register
    Register (in=in4, load=load4, out=out2);
    And16 (a=out2, b=out2, out=out);
}